Efficient Circuit Design with Data Regression Models

Introduction

In the world of electronics and semiconductor manufacturing, circuit design is an essential yet complex task that demands precision, efficiency, and innovation. Determining the optimal values for circuit elements like resistors, capacitors, and inductors is a meticulous process that can significantly impact the performance and reliability of electronic devices. Our patented data generation method for regression models offers a transformative solution, automating and optimizing circuit element value determination to improve design outcomes and streamline production.

The Challenge of Circuit Element Value Determination

The design of electronic circuits requires selecting precise values for components that ensure optimal performance across various applications. Traditional methods of determining these values can be time-consuming, manual, and prone to errors, especially when dealing with highly complex circuits. For companies in the semiconductor and electronics industries, this challenge can lead to longer design cycles, higher costs, and less efficient manufacturing processes.

Given the increasing complexity of modern electronics, there is a growing need for tools that automate and improve the accuracy of these calculations. Without such innovations, designers may struggle to keep up with the demand for more efficient, reliable, and compact circuit designs.

Why Choose Efficient Circuit Design?

Our patented data generation method integrates advanced regression models to simplify the process of circuit element value determination. By analyzing data trends and optimizing calculations, this technology delivers faster, more accurate results. This leads to improved circuit performance, enhanced design efficiency, and lower production costs.

For electronics manufacturers, this technology reduces design time by automating the calculation of optimal component values, helping teams meet tight production deadlines. The method is highly adaptable and can be applied to a wide range of circuit types, from simple consumer electronics to complex semiconductors.

Key Benefits

Faster Design Cycles: Automates the process of determining circuit element values, saving valuable time.
Enhanced Precision: Uses regression models to improve accuracy in component selection.
Cost-Effective: Reduces design errors and optimizes the manufacturing process.
Versatile Applications: Applicable to a wide range of electronics, from simple circuits to advanced semiconductors.

Transform Circuit Design with Efficient Circuit Design Technology

Licensing this cutting-edge regression model technology offers electronics and semiconductor companies a powerful tool to streamline their design processes. With faster, more accurate calculations, this method helps reduce costs, shorten production times, and improve the overall performance of electronic devices.

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Abstract
Claims

A method, computer program, and computer system is provided for fault detection in an electrical network. An inductance between a reference point and a fault is determined at a first time based on measuring a fault current. A resistance between the reference point and the fault may be determined at a second time based on measuring a differential of the fault current as zero. A location of the fault may be identified based on the inductance and the resistance.

What is claimed is:

1. A method of transient fault detection in an electrical network, executable by a processor, comprising:

determining, based on measuring a fault current for a one half cycle length of discrete sample data, an inductance between a reference point and a fault;

determining, based on a differential of the fault current being zero for the one half cycle length of the discrete sample data, a resistance between the reference point and the fault; and

identifying a line inductance and a line resistance of a fault loop associated with the fault based on the inductance and the resistance.

2. The method of claim 1, wherein voltage and the inductance are determined based on a least-squares estimation.

3. The method of claim 2, wherein the least-squares estimation minimizes a weighted sum of the squares of an error value corresponding to a circuit equation associated with the electrical network.

4. The method of claim 2, wherein the least-squares estimation is performed based on a first matrix corresponding to one or more sampled voltages, a second matrix corresponding to one or more sampled currents, and a third matrix corresponding to the resistance and the inductance.

5. The method of claim 4, wherein the resistance and the inductance are determined for the third matrix based on performing a regression on the first and the second matrices.

6. The method of claim 1, wherein based on detecting multiple points where the differential of the fault current is zero, the resistance and the inductance are determined based on a discrete parameter estimation with least-squares.

7. The method of claim 1, wherein the fault corresponds to an intermittent fault.

8. A computer system for transient fault detection in an electrical network, the computer system comprising:

one or more computer-readable non-transitory storage media configured to store computer program code; and

one or more computer processors configured to access said computer program code and operate as instructed by said computer program code, said computer program code including:

first determining code configured to cause the one or more computer processors to determine, based on measuring a fault current for a one half cycle length of discrete sample data, an inductance between a reference point and a fault;

second determining code configured to cause the one or more computer processors to determine, based on a differential of the fault current being zero for the one half cycle length of the discrete sample data, a resistance between the reference point and the fault; and

identifying code configured to cause the one or more computer processors to identify a line inductance and a line resistance of a fault loop associated with the fault based on the inductance and the resistance.

9. The computer system of claim 8, wherein the voltage and the inductance are determined based on a least-squares estimation.

10. The computer system of claim 9, wherein the least-squares estimation minimizes a weighted sum of the squares of an error value corresponding to a circuit equation associated with the electrical network.

11. The computer system of claim 9, wherein the least-squares estimation is performed based on a first matrix corresponding to one or more sampled voltages, a second matrix corresponding to one or more sampled currents, and a third matrix corresponding to the resistance and the inductance.

12. The computer system of claim 11, wherein the resistance and the inductance are determined for the third matrix based on performing a regression on the first and the second matrices.

13. The computer system of claim 8, wherein based on detecting multiple points where the differential of the fault current is zero, the resistance and the inductance are determined based on a discrete parameter estimation with least-squares.

14. The computer system of claim 8, wherein the fault corresponds to an intermittent fault.

15. A non-transitory computer readable medium having stored thereon a computer program for transient fault detection in an electrical network, the computer program configured to cause one or more computer processors to:

determine, based on measuring a fault current for a one half cycle length of discrete sample data, an inductance between a reference point and a fault;

determine, based on a differential of the fault current as being zero for the one half cycle length of the discrete sample data, a resistance between the reference point and the fault; and

identify a line inductance and a line resistance of a fault loop associated with the fault based on the inductance and the resistance.

16. The computer readable medium of claim 15, wherein voltage and the inductance are determined based on a least-squares estimation.

17. The computer readable medium of claim 16, wherein the least-squares estimation minimizes a weighted sum of the squares of an error value corresponding to a circuit equation associated with the electrical network.

18. The computer readable medium of claim 16, wherein the least-squares estimation is performed based on a first matrix corresponding to one or more sampled voltages, a second matrix corresponding to one or more sampled currents, and a third matrix corresponding to the resistance and the inductance.

19. The computer readable medium of claim 18, wherein the resistance and the inductance are determined for the third matrix based on performing a regression on the first and the second matrices.

20. The computer readable medium of claim 15, wherein based on detecting multiple points where the differential of the fault current is zero, the resistance and the inductance are determined based on a discrete parameter estimation with least-squares.

Title

Data generation method for regression models for circuit element value determination

Inventor(s)

Charles J Kim

Assignee(s)

Howard University

Patent #

11782084

Patent Date

October 10, 2023